1. Field of the Invention
This invention relates to a semiconductor device and more particularly to a volatile semiconductor memory device, constructed with a metal-insulator-semiconductor structure.
There are known two basic types of semiconductor memory, one known as volatile memory and one known as non-volatile memory. In volatile memories the stored data is lost when the power supply is removed from the semiconductor device. Non-volatile memory retains the data stored for extended periods after the power supply to the device has been removed.
In a computer architecture, non-volatile memory is used for long-term storage of programs and data which seldom or never change, and volatile memory devices are used for the short-term storage of program instructions and data during the execution of a program.
Known volatile memory devices may be further divided into two categories. Static Random Access Memory (SRAM) consists of flip-flop latches, which each retain one bit of data for as long as power is maintained. In Dynamic Random Access Memory (DRAM), each memory cell is made up from one transistor and a capacitor.
2. Discussion of the Related Art
FIG. 1 shows, schematically, the construction of a typical DRAM cell where C represents the capacitor for storing charge, and T represents the transistor which serves to transport charge to the capacitor, and also, operated under different bias conditions, for reading the charged or uncharged state of the capacitor. The data bit is stored as charge on the capacitor and decays with time, due to the leakage current of the capacitor. Each bit of data in a DRAM device must therefore be periodically refreshed before it has decayed irretrievably.
Known DRAM cells are also susceptible to failure due to incident ionizing radiation. Such radiation may originate in the atmosphere in the form of cosmic rays, in the working environment of the memory device, or even in the packaging materials used to encase the memory device. When a particle or ray of incident radiation meets the memory device, it may cause a temporary conductive path to be established, by forming electron/hole pairs in the dielectric or substrate layers. This conductive path may breach either the dielectric layer of the charge storage capacitor or a P-N junction below the charge storage capacitor, in either case, causing loss of charge and hence loss of stored data.
In known non-volatile memory devices, a charge is stored directly above the channel regions of insulated gate field effect transistors (IGFETs) resulting in the modulation of the IGFET's conductance. This may also be regarded as a modulation of the transistor's threshold voltage. Such a phenomenon is successfully utilized in the manufacture of certain memory devices of the long term storage type. A floating gate of a conductive material such as polycrystalline silicon completely embedded in dielectric layers may be used to hold charge supplied by a tunnelling effect through the surrounding dielectric layers.
Also known (U.S. Pat. No. 4,868,618 by the current inventor) is a long term storage memory device using charge storage above the channel regions of IGFETS in electron traps. Such electron traps are intentionally introduced within the dielectric, separated from the semiconductor/dielectric interface by at least 7 nm (column 3, lines 43 to 47 of U.S. Pat. No. 4,868,618 specify that the highest concentration of ions is not contiguous with the interface, and that a distance of greater than 7 nm is sought). Such traps, buried within the dielectric layer, have a very long storage time.
The volatile memory cells described herebefore have the advantage that they have much faster read and write times than non-volatile memories. They are therefore suitable for use during the execution of computer programs where fast short term memory is required.
Non-volatile memories are suitable for long-term storage of data which rarely or never change, as they retain their data even though the power is removed from the chip, but are very slow to program.
Both volatile and non-volatile memory are thus required in most computer applications, but the volatile memory is a more significant factor in determining the operating speed of a program.
Between the two types of volatile memory available, SRAM has the advantages that no refreshing of the data in the memory is required, leading to easier design of circuits. The memory cycle time of an SRAM may be around 10 ns. This is rather faster than the cycle time for DRAM.
Refreshing of the data contained in a DRAM circuit must typically be done every few milliseconds, and makes for more complicated design than SRAM-based circuits.
These apparent disadvantages are outweighed, at least for reasonably complex circuits requiring large memory capacity, by the fact that DRAM cells are cheaper to manufacture and occupy much less semiconductor surface area than SRAM cells, giving more cells per chip. In 1980, P. Horowitz and W. Hill estimated that DRAM provided 8 times the memory capacity per unit price of a contemporary SRAM cell.
Whereas a major attraction of DRAM volatile memory cells is their much smaller surface area, a limit to the possible size reduction of such a cell is reached because of the physical size of the capacitor required to retain sufficient charge for memory applications, plus the area required for the interconnect between the transistor and the capacitor.
The previously known memory cells using charge storage above the channel of a transistor are only suitable for long term storage memory devices, due to the elevated voltages and relatively long times required to charge or discharge the floating gate or the buried traps. Such memory cells have write cycle times of hundreds of microseconds and are therefore not useful for fast, short term data storage.